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NAND gate
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NAND gate : ウィキペディア英語版
NAND gate

In digital electronics, a NAND gate (negative-AND) is a logic gate which produces an output which is false only if all its inputs are true; thus its output is complement to that of the AND gate. A LOW (0) output results only if both the inputs to the gate are HIGH (1); if one or both inputs are LOW (0), a HIGH (1) output results. It is made using transistors. By De Morgan's theorem, =+, a NAND gate is equivalent to inverters followed by an OR gate.
The NAND gate is significant because any boolean function can be implemented by using a combination of NAND gates. This property is called functional completeness.
Digital systems employing certain logic circuits take advantage of NAND's functional completeness.
The function is logically equivalent to
== Symbols ==
There are three symbols for NAND gates: the MIL/ANSI symbol, the IEC symbol and the deprecated DIN symbol sometimes found on old schematics. For more information see logic gate symbols. The ANSI symbol for the NAND gate is a standard AND gate with an inversion bubble connected.

抄文引用元・出典: フリー百科事典『 ウィキペディア(Wikipedia)
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